Testing UVM Drivers, Part 2

In the previous post we looked at how we can emulate sequencer/driver communication using a lightweight stub of uvm_sequencer. Let's also look at some more tips and tricks I've picked up while writing unit tests for drivers. To mix things up a bit, let's look at the AXI protocol. We're not going to implement a full featured driver; instead, we'll focus on the write channels:

This is a companion discussion topic for the original entry at https://verificationgentleman.netlify.app/2016/08/15/testing-uvm-drivers-part-2.html

In the transaction you wtote some properties, and thaen “…” do we have to add more properties?

What is `SVTEST?

They’re from SVUnit, a unit testing library for SystemVerilog. Since this is a post about unit testing, I have to assume some prior knowledge from the readers.

You can find a tutorial here: SVUnit Getting Started | AgileSoC

The “…” are placeholders for stuff like constructor, UVM factory registration macros and field automation macros. I don’t generally put them in code snippets to keep them short and to the point.

The sequence item defined in this post is very bare-bones and only covers writes. A full AXI item would need more variables.

What about all the other signals (for example ARBURST,ARLOCK,ARCACHE,ARPROT,ARQOS,ARREGION)? There are many more signal according the specification of AXI4. Shouldn’t they also appear in the interface?
In addition, shouldn’t you add more properties in the transaction like the size of transaction (the size each transfer in the burst)?