Reflection is a mechanism that allows "inspection of classes, interfaces, fields and methods at runtime without knowing the names of the interfaces, fields, methods at compile time. It also allows instantiation of new objects and invocation of methods". In e, using reflection together with define as compute macros allows us to do some really cool stuff.
Hi Tudor. I discovered you’re blog recently and it’s been very helpful for me. Thanks and please keep up the good work.
After this formal introduction … I also have a question:
Do you know if there’s a way to connect SystemVerilog with other languages besides C ?
I’ve accesed, in the past, C-models (acting as the Golden Model for my DUT) from my Scoreboard. I was wandering if such Golden/Reference Models written in other languages, like Python, could be accessed from a SystemVerilog testbench.
Thanks,
Gabi
I’ve seen some code that interfaced with Python via the DPI, but it had to go via C to do it: SV → C → Python. Basically you’d need to define a C wrapper for your Python (which you could do via SWIG) and import the C functions inside your SV code.
Apparently, the reason I didn’t have to wrap ‘vpi_handle’ inside the C code and import the wrapper was because I wasn’t using it in my code. Once I tried calling it, the simulator complained that it couldn’t find it. It seems like I need to wrap all C function I’m using.
Like i dont get when to use VPI/DPI in my project. I always think of using VPI/DPI but cant think of any scenarios. Can you tell some scenarios where we can use VPI/DPI or is it helpful for Ex: some checker implementation. etc.
I know using VPI we can get HDL paths apart from this if you can tell me some interesting scenarios where i can use VPI it will be very helpful.