|
Testing UVM Drivers, Part 2
|
|
6
|
440
|
November 14, 2021
|
|
A Quick Look at SVAUnit
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6
|
418
|
November 14, 2021
|
|
Some More Ideas on Coverage Extendability
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3
|
317
|
November 13, 2021
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|
UVM Drain Time - The Old Fashioned Way
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15
|
992
|
November 14, 2021
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The Humble Beginnings of a SystemVerilog Reflection API, Part 3
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3
|
310
|
November 14, 2021
|
|
How Do I Transfer Thee? Let Me Count the Ways
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6
|
415
|
November 13, 2021
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Fun and Games with CRV: Einstein’s Puzzle (Revisited)
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2
|
300
|
November 14, 2021
|
|
On SystemVerilog Coding Conventions - Challenging the Status Quo
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14
|
714
|
November 13, 2021
|
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Be More Assertive about Your Testbench Code
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6
|
496
|
November 13, 2021
|
|
Some Ideas on Coverage Extendability
|
|
2
|
267
|
November 13, 2021
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|
Rambling About UVM Factory Overrides - Per Type
|
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14
|
672
|
November 13, 2021
|
|
Keeping Constraints and Covergroups in Sync
|
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5
|
460
|
November 13, 2021
|
|
Cooking at Home or Eating Out? - The Pros and Cons of Homegrown VIP
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7
|
394
|
November 13, 2021
|
|
Fun and Games with CRV: Draw This Without Lifting Your Pencil
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4
|
330
|
November 13, 2021
|
|
Patching a Leaky Boat - Handling UVM Bugs
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8
|
421
|
November 13, 2021
|
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Less Is More - Why I Favor Short Tests
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3
|
304
|
November 13, 2021
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|
Temporary Variables in SystemVerilog Procedural Blocks
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2
|
294
|
November 13, 2021
|
|
Using indirect_access(…) in vr_ad
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4
|
332
|
November 13, 2021
|
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Working with Multiple Instances of vr_ad Registers
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4
|
360
|
November 13, 2021
|
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Experimental Cures for Flattened Register Definitions in vr_ad
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3
|
313
|
November 13, 2021
|