|
Testing UVM Drivers, Part 2
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6
|
1369
|
November 14, 2021
|
|
A Quick Look at SVAUnit
|
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6
|
1060
|
November 14, 2021
|
|
Some More Ideas on Coverage Extendability
|
|
3
|
839
|
November 13, 2021
|
|
UVM Drain Time - The Old Fashioned Way
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|
15
|
2855
|
November 14, 2021
|
|
The Humble Beginnings of a SystemVerilog Reflection API, Part 3
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3
|
728
|
November 14, 2021
|
|
How Do I Transfer Thee? Let Me Count the Ways
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6
|
975
|
November 13, 2021
|
|
Fun and Games with CRV: Einstein’s Puzzle (Revisited)
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2
|
764
|
November 14, 2021
|
|
On SystemVerilog Coding Conventions - Challenging the Status Quo
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|
14
|
2603
|
November 13, 2021
|
|
Be More Assertive about Your Testbench Code
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|
6
|
1310
|
November 13, 2021
|
|
Some Ideas on Coverage Extensibility
|
|
2
|
679
|
November 13, 2021
|
|
Rambling About UVM Factory Overrides - Per Type
|
|
14
|
2054
|
November 13, 2021
|
|
Keeping Constraints and Covergroups in Sync
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|
5
|
1568
|
November 13, 2021
|
|
Cooking at Home or Eating Out? - The Pros and Cons of Homegrown VIP
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|
7
|
870
|
November 13, 2021
|
|
Fun and Games with CRV: Draw This Without Lifting Your Pencil
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4
|
829
|
November 13, 2021
|
|
Patching a Leaky Boat - Handling UVM Bugs
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8
|
996
|
November 13, 2021
|
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Less Is More - Why I Favor Short Tests
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3
|
699
|
November 13, 2021
|
|
Temporary Variables in SystemVerilog Procedural Blocks
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2
|
758
|
November 13, 2021
|
|
Using indirect_access(…) in vr_ad
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4
|
771
|
November 13, 2021
|
|
Working with Multiple Instances of vr_ad Registers
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4
|
991
|
November 13, 2021
|
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Experimental Cures for Flattened Register Definitions in vr_ad
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|
3
|
804
|
November 13, 2021
|